
Release notes for Marvell CORE Driver, release: 3.4.7
============================================================================

Table of Contents
-----------------

1.	Contents of Release
2.	Changes from Previous Releases
3.	File Structures
4.	Known Issues
5.      Notes
6.      Disclaimer
	

1. Contents of Release 3.4.7
==============================

 - Support for 88SX50XX adapters stepping B0 and B2.

 - Support for 88SX60X1 adapters stepping B1 and B2


2. Changes from Previous Releases
=================================

Changes from Release 3.4.0
----------------------------
Updated files:

Move compiler dependent includes from mvLog.c to mvOs.h. These includes are:
stdio.h and stdarg.h

In mvRegs.h, masked bit 5 in the Gen II EDMA error mask, and added it to the
recoverable EDMA errors mask

In mvSata.c remove an unused function mvAta2HostString() and added initialization
to local variables to prevent compiler warnings.

In handleRecoverableError() function, clear the SError register if bit 5 is set in
the EDMA error cause.

In mvSataConfigureChannel, disable SaDevInterrupt(). The interrupt is enabled only
when enabling the commands queuing.

Added files:


Deleted files:


Changes from Release 3.2.1
----------------------------
Updated files:

Added NCQ and queued command based switching support (Marvell port multipliers).
The NCQ supports is configuring EDMA in NCQ mode and error handling in case
device error in NCQ / queued command based switching.
The error handling is sending READ LOG EXT page 10 command to the failed drive;
the allocation of the response buffer of this command is put in the request
queue in order to save space.
The algorithm is as follows -
If device error is detected continue sending and executing commands in request
queue and modify the state of the channel to NCQ error handling.
In this state the driver waits for all commands on the other drives to complete
(if any) and afterwards it issues EDMA disable and sends the READ LOG EXT SATA
command.
The errorneous command is completed to the IAL with the corresponding error
condition and the abort commands (commands that are queued after the error
occured and commands that are aborted by the drive) are requeued to the EDMA
to continue command execution.

Added fatal error debug prints. This is in order to add prints of debug messages
of fatal events (such as invalid pointers etc...)

Added 88SX60X1 FEr SATA #16 workaround.

Added support for recovered / unrecovered errors event notification call back.
Upon such event the IAL is called with the event notification function.
If there was 10 consecutive recovered errors with no DMA or PIO operation
completed, then the IAL notification function is called with unrecovered
error notification.
The recover / unrecovered errors are detected from the EDMA error cause
register.
This new mechanism is described in a companion document for the release
explaining the differences between CORE driver version 3.2.1 and 3.4.0

Added support of modifying the DRQ block size (instead of fixed 512B). This
can be done by modifying the variable DRQDataBlockSize in the channel's
data structure.

Added a sanity check in dumpAtaDeviceRegisters to check if EDMA is active
or not. If not then the function will not dump the ATA registers.

Added FUA boolean field in MV_UDMA_COMMAND_PARAMS struct. This feature is used
only with NCQ drives and used to direct the hard drive to perform the required
IO bypassing the drive's cache buffers.

Added MV_NCQ_ERROR_HANDLING_STATE struct the describes NCQ error handling
state machine used by the CORE driver per SATA channel.

Removed 88SX50XX B1 support. The supported device of 88SX50XX are B0 and B2
stepping (note that future revision support feature is still implemented)

Removed 88SX60X1 A0 and B0 support. The supported devices of 88SX60X1 are
B1 and B2 stepping (note that future revision support feature is still implemented).

Removed auto flush mechanism. Instead a fixed mechanism of re-queuing the
aborted commands after device error algorithm is performed.

Modified fix for 88SX60X1 FEr SATA #10 to retry OOB sequence in case the
SStatus after OOB is not 0x0 or 0x123 or 0x113.

Removed the code that sends SW reset to the hard drive after device error
in case of 88SX60X1 device.
Instead SW reset is sent to 88SX60X1 device when activating EDMA when BSY is
'1' OR DRDY is '0' OR DRQ is '1'.
Note that the driver sends SW reset in the 88SX50XX adapter after device
error condition.

When sending vendor unique FIS using 'sendVendorUniqueFIS' function, perform
polling of 1uSec intervals instead of 10uSec. This decreases the execution
time of this function since the FIS is likely to be sent in less than the
interval polling time.

Added a call to disable SaDevInterrupt in mvSataConfigureChannel. The
device interrupts in PIO command will be enabled when queuing a PIO command
through mvSataQueueCommand.


Added files:


Deleted files:



Changes from Release 3.2.0-B
----------------------------
Updated files:

Modified log messages

Added dump of SATA register in handleEdmaFailedCommand.

In handleEdmaInterrupt read the EDMA error cause as 32bit register and not 16bit.
This modifications is to support extra bits added to 88SX60X1 adapters.

In handleEdmaInterrupt add workaround to wait extra 20mSec after clearing EDMA error
cause register in case the register is set back again. This is in order to workaround
a port multiplier's hotplug on device SATA channels issue.

In handleEdmaInterrupt add prints of PCI and EDMA registers in case a parity error
is detected.

In handleEdmaInterrupt in the disconnect handler, when receiving such event and the link
is still up then don't send a disconnect event notification.
Such scenario is found when using hot plugging port multiplier and it is in legacy mode.

In handleEdmaInterrupt in the connect handler, when receiving such event and the link
is down then don't send a connect event notification.
Such scenario is found when using hot plugging port multiplier and it is in legacy mode.

In handleEdmaInterrupt added a fix not check SATA interface status when the adapter
is 60X1 A1 stepping.

For 50X1 in handleEdmaInterrupt connect handler, if a connect is received then issue
COMRESET twice to the drive. This is in order to fix hot plug issue with non-marvell driven
hard drives.

In _establishSataComm modified the timing between the issue of DET 1 and 0 to the SControl
register.
Also added a code to wait up to 200mSec for checking if PHY is ready.

In activateEdma when clearing EDMA interrupts for 60X1 devices, the code doesn't clear
bit 8. This is in order to keep previous SDB FIS sent by port multiplier upon hot-plug event
on it's device side SATA channels.

Modified pre/amp parameters for 60X1 B0 adapter to 2 and 6 respectivly.

Added fix for 88SX60x1 FEr PCI#7.

Removed unneeded delay in checkSStatusAfterHReset.
Also the SStatus check is performed also on 50XX adapter.

Added setting for EDMA command threshold to 0x4b when configuring EDMA in NCQ mode.

Removed semaphores in mvSataCheckPendingInterrupt.

In mvSataInterruptServiceRoutine, when receiving a PCI error then print the PCI and all
EDMA registers.

Modified default log function to printf.

In executeNonUDMACommand if the command is for port multiplier's internal register then
don't check the ATA Status if ready.

In mvPMDevEnableStaggeredSpinUpAll poll for 200mSec and wait for DET 3 or DET 0.



 Added files:


 Deleted files:


3. File Structures
==================

-->CoreDriver
      |
      +----->mvSata.c
      +----->mvSata.h
      +----->mvStorageDev.c
      +----->mvStorageDev.h
      +----->mvRegs.h
      +----->mvLog.c
      ------>mvLog.h

4. Known Issues
===============
The workaround of the RX calibration i(documented as "6081 FEr SATA#23") is not
working properly.
This workaround will be fixed in future revisions of the CORE Driver.



5. Notes
========




6. Disclaimer
=============
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